The present invention relates in general to computer circuitry and, more particularly, to a method and apparatus for implementing a "pseudo" dual port memory from a single port zero bus turnaround random access memory (RAM).
Dual port memories are useful for numerous applications and are particularly well suited for communications and multiprocessor systems. For example, communications applications known as Asynchronous Transfer Mode (ATM) require large amounts of data to be transferred between two processing devices which is easily accomplished using dual port memories. And, in multiprocessor systems, dual port memories enable one processor to write data into an array while another processor can read data out of the array.
One specialized form of dual port memory is a dual port first-in first-out (FIFO) circuit. As its name implies, information is written into a FIFO circuit in sequence and read out of the circuit in the same sequence after some delay. A FIFO circuit has one port through which data is written and one port through which data is read.
Dual port random access memories (RAMs) are constructed using a variety of techniques. In a first conventional technique, each memory cell is truly dual port and thus requires eight transistors. Because eight transistor dual port memory cells make the memory array itself quite large, integrated circuit memories based on this technique are expensive. A second technique utilizes standard single port static RAM cells with a partitioned array. If both ports simultaneously attempt to access the same partition, then one of the accesses must be delayed. As the number of partitions increases, the likelihood that a collision will occur decreases, but the cost increases due to the extra decoding and collision detection circuitry. A third technique accesses a single port RAM at twice the speed of an external clock signal such that one port is accessed during a first portion of the clock cycle and the other port is accessed during the second portion of the clock cycle.
While such known techniques provide dual port memories, some utilizing single port memories for their construction, there is a continuing need to advance the art by providing alternate methods and apparatus for producing dual port memories. Preferably, such dual port memories would utilize single port RAMs yet provide dual port memories that are inexpensive and also fast.